QuarterArcade Coin-Op Tech Net

Quick Nav: # A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

Coin-Op : Arcade : Blades Of Steel : VM Driver Source

Source Listing


     1: /***************************************************************************
     2: 
     3: Blades of Steel(GX797) (c) 1987 Konami
     4: 
     5: Driver by Manuel Abadia <manu@teleline.es>
     6: 
     7: Interrupts:
     8: 
     9: 	CPU #0 (6309):
    10: 	--------------
    11: 	* IRQ: not used.
    12: 	* FIRQ: generated by VBLANK.
    13: 	* NMI: writes the sound command to the 6809.
    14: 
    15: 	CPU #1 (6809):
    16: 	--------------
    17: 	* IRQ: triggered by the 6309 when a sound command is written.
    18: 	* FIRQ: not used.
    19: 	* NMI: not used.
    20: 
    21: Notes:
    22: 	* The protection is not fully understood(Konami 051733). The
    23: 	game is playable, but is not 100% accurate.
    24: 	* Missing samples.
    25: 
    26: ***************************************************************************/
    27: 
    28: #include "driver.h" 
    29: #include "cpu/m6809/m6809.h" 
    30: #include "cpu/hd6309/hd6309.h" 
    31: #include "vidhrdw/generic.h" 
    32: #include "vidhrdw/konamiic.h" 
    33: 
    34: /* from vidhrdw */
    35: int bladestl_spritebank;
    36: VIDEO_START( bladestl );
    37: VIDEO_UPDATE( bladestl );
    38: PALETTE_INIT( bladestl );
    39: WRITE_HANDLER( bladestl_vreg_w );
    40: 
    41: static INTERRUPT_GEN( bladestl_interrupt )
    42: {
    43: 	if (cpu_getiloops() == 0){
    44: 		if (K007342_is_INT_enabled())
    45: 			cpu_set_irq_line(0, HD6309_FIRQ_LINE, HOLD_LINE);
    46: 	}
    47: 	else if (cpu_getiloops() % 2){
    48: 		cpu_set_irq_line(0, IRQ_LINE_NMI, PULSE_LINE);
    49: 	}
    50: }
    51: 
    52: static READ_HANDLER( trackball_r )
    53: {
    54: 	static int last[4];
    55: 	int curr,delta;
    56: 
    57: 
    58: 	curr = readinputport(5 + offset);
    59: 	delta = (curr - last[offset]) & 0xff;
    60: 	last[offset] = curr;
    61: 	return (delta & 0x80) | (curr >> 1);
    62: }
    63: 
    64: static WRITE_HANDLER( bladestl_bankswitch_w )
    65: {
    66: 	unsigned char *RAM = memory_region(REGION_CPU1);
    67: 	int bankaddress;
    68: 
    69: 	/* bits 0 & 1 = coin counters */
    70: 	coin_counter_w(0,data & 0x01);
    71: 	coin_counter_w(1,data & 0x02);
    72: 
    73: 	/* bits 2 & 3 = lamps */
    74: 	set_led_status(0,data & 0x04);
    75: 	set_led_status(1,data & 0x08);
    76: 
    77: 	/* bit 4 = relay (???) */
    78: 
    79: 	/* bits 5-6 = bank number */
    80: 	bankaddress = 0x10000 + ((data & 0x60) >> 5) * 0x2000;
    81: 	cpu_setbank(1,&RAM[bankaddress]);
    82: 
    83: 	/* bit 7 = select sprite bank */
    84: 	bladestl_spritebank = (data & 0x80) << 3;
    85: 
    86: }
    87: 
    88: static WRITE_HANDLER( bladestl_sh_irqtrigger_w )
    89: {
    90: 	soundlatch_w(offset, data);
    91: 	cpu_set_irq_line(1, M6809_IRQ_LINE, HOLD_LINE);
    92: 	//logerror("(sound) write %02x\n", data);
    93: }
    94: 
    95: static WRITE_HANDLER( bladestl_port_B_w ){
    96: 	/* bit 1, 2 unknown */
    97: 	UPD7759_set_bank_base(0, ((data & 0x38) >> 3)*0x20000);
    98: }
    99: 
   100: static WRITE_HANDLER( bladestl_speech_ctrl_w ){
   101: 	UPD7759_reset_w(0, data & 1);
   102: 	UPD7759_start_w(0, data & 2);
   103: }
   104: 
   105: static MEMORY_READ_START( bladestl_readmem )
   106: 	{ 0x0000, 0x1fff, K007342_r },			/* Color RAM + Video RAM */
   107: 	{ 0x2000, 0x21ff, K007420_r },			/* Sprite RAM */
   108: 	{ 0x2200, 0x23ff, K007342_scroll_r },	/* Scroll RAM */
   109: 	{ 0x2400, 0x245f, paletteram_r },		/* Palette */
   110: 	{ 0x2e01, 0x2e01, input_port_3_r },		/* 1P controls */
   111: 	{ 0x2e02, 0x2e02, input_port_4_r },		/* 2P controls */
   112: 	{ 0x2e03, 0x2e03, input_port_1_r },		/* DISPW #2 */
   113: 	{ 0x2e40, 0x2e40, input_port_0_r },		/* DIPSW #1 */
   114: 	{ 0x2e00, 0x2e00, input_port_2_r },		/* DIPSW #3, coinsw, startsw */
   115: 	{ 0x2f00, 0x2f03, trackball_r },		/* Trackballs */
   116: 	{ 0x2f80, 0x2f9f, K051733_r },			/* Protection: 051733 */
   117: 	{ 0x4000, 0x5fff, MRA_RAM },			/* Work RAM */
   118: 	{ 0x6000, 0x7fff, MRA_BANK1 },			/* banked ROM */
   119: 	{ 0x8000, 0xffff, MRA_ROM },			/* ROM */
   120: MEMORY_END
   121: 
   122: static MEMORY_WRITE_START( bladestl_writemem )
   123: 	{ 0x0000, 0x1fff, K007342_w },				/* Color RAM + Video RAM */
   124: 	{ 0x2000, 0x21ff, K007420_w },				/* Sprite RAM */
   125: 	{ 0x2200, 0x23ff, K007342_scroll_w },		/* Scroll RAM */
   126: 	{ 0x2400, 0x245f, paletteram_xBBBBBGGGGGRRRRR_swap_w, &paletteram },/* palette */
   127: 	{ 0x2600, 0x2607, K007342_vreg_w },			/* Video Registers */
   128: 	{ 0x2e80, 0x2e80, bladestl_sh_irqtrigger_w },/* cause interrupt on audio CPU */
   129: 	{ 0x2ec0, 0x2ec0, watchdog_reset_w },		/* watchdog reset */
   130: 	{ 0x2f40, 0x2f40, bladestl_bankswitch_w },	/* bankswitch control */
   131: 	{ 0x2f80, 0x2f9f, K051733_w },				/* Protection: 051733 */
   132: 	{ 0x2fc0, 0x2fc0, MWA_NOP },				/* ??? */
   133: 	{ 0x4000, 0x5fff, MWA_RAM },				/* Work RAM */
   134: 	{ 0x6000, 0x7fff, MWA_RAM },				/* banked ROM */
   135: 	{ 0x8000, 0xffff, MWA_ROM },				/* ROM */
   136: MEMORY_END
   137: 
   138: static MEMORY_READ_START( bladestl_readmem_sound )
   139: 	{ 0x0000, 0x07ff, MRA_RAM },				/* RAM */
   140: 	{ 0x1000, 0x1000, YM2203_status_port_0_r },	/* YM2203 */
   141: 	{ 0x1001, 0x1001, YM2203_read_port_0_r },	/* YM2203 */
   142: 	{ 0x4000, 0x4000, UPD7759_0_busy_r },		/* UPD7759 */
   143: 	{ 0x6000, 0x6000, soundlatch_r },			/* soundlatch_r */
   144: 	{ 0x8000, 0xffff, MRA_ROM },				/* ROM */
   145: MEMORY_END
   146: 
   147: static MEMORY_WRITE_START( bladestl_writemem_sound )
   148: 	{ 0x0000, 0x07ff, MWA_RAM },				/* RAM */
   149: 	{ 0x1000, 0x1000, YM2203_control_port_0_w },/* YM2203 */
   150: 	{ 0x1001, 0x1001, YM2203_write_port_0_w },	/* YM2203 */
   151: 	{ 0x3000, 0x3000, bladestl_speech_ctrl_w },	/* UPD7759 */
   152: 	{ 0x5000, 0x5000, MWA_NOP },				/* ??? */
   153: 	{ 0x8000, 0xffff, MWA_ROM },				/* ROM */
   154: MEMORY_END
   155: 
   156: /***************************************************************************
   157: 
   158: 	Input Ports
   159: 
   160: ***************************************************************************/
   161: 
   162: INPUT_PORTS_START( bladestl )
   163: 	PORT_START	/* DSW #1 */
   164: 	PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
   165: 	PORT_DIPSETTING(    0x02, DEF_STR( 4C_1C ) )
   166: 	PORT_DIPSETTING(    0x05, DEF_STR( 3C_1C ) )
   167: 	PORT_DIPSETTING(    0x08, DEF_STR( 2C_1C ) )
   168: 	PORT_DIPSETTING(    0x04, DEF_STR( 3C_2C ) )
   169: 	PORT_DIPSETTING(    0x01, DEF_STR( 4C_3C ) )
   170: 	PORT_DIPSETTING(    0x0f, DEF_STR( 1C_1C ) )
   171: 	PORT_DIPSETTING(    0x00, DEF_STR( 4C_5C ) )
   172: 	PORT_DIPSETTING(    0x03, DEF_STR( 3C_4C ) )
   173: 	PORT_DIPSETTING(    0x07, DEF_STR( 2C_3C ) )
   174: 	PORT_DIPSETTING(    0x0e, DEF_STR( 1C_2C ) )
   175: 	PORT_DIPSETTING(    0x06, DEF_STR( 2C_5C ) )
   176: 	PORT_DIPSETTING(    0x0d, DEF_STR( 1C_3C ) )
   177: 	PORT_DIPSETTING(    0x0c, DEF_STR( 1C_4C ) )
   178: 	PORT_DIPSETTING(    0x0b, DEF_STR( 1C_5C ) )
   179: 	PORT_DIPSETTING(    0x0a, DEF_STR( 1C_6C ) )
   180: 	PORT_DIPSETTING(    0x09, DEF_STR( 1C_7C ) )
   181: 	PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
   182: 	PORT_DIPSETTING(    0x20, DEF_STR( 4C_1C ) )
   183: 	PORT_DIPSETTING(    0x50, DEF_STR( 3C_1C ) )
   184: 	PORT_DIPSETTING(    0x80, DEF_STR( 2C_1C ) )
   185: 	PORT_DIPSETTING(    0x40, DEF_STR( 3C_2C ) )
   186: 	PORT_DIPSETTING(    0x10, DEF_STR( 4C_3C ) )
   187: 	PORT_DIPSETTING(    0xf0, DEF_STR( 1C_1C ) )
   188: 	PORT_DIPSETTING(    0x00, DEF_STR( 4C_5C ) )
   189: 	PORT_DIPSETTING(    0x30, DEF_STR( 3C_4C ) )
   190: 	PORT_DIPSETTING(    0x70, DEF_STR( 2C_3C ) )
   191: 	PORT_DIPSETTING(    0xe0, DEF_STR( 1C_2C ) )
   192: 	PORT_DIPSETTING(    0x60, DEF_STR( 2C_5C ) )
   193: 	PORT_DIPSETTING(    0xd0, DEF_STR( 1C_3C ) )
   194: 	PORT_DIPSETTING(    0xc0, DEF_STR( 1C_4C ) )
   195: 	PORT_DIPSETTING(    0xb0, DEF_STR( 1C_5C ) )
   196: 	PORT_DIPSETTING(    0xa0, DEF_STR( 1C_6C ) )
   197: 	PORT_DIPSETTING(    0x90, DEF_STR( 1C_7C ) )
   198: 
   199: 	PORT_START	/* DSW #2 */
   200: 	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
   201: 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
   202: 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
   203: 	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
   204: 	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
   205: 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
   206: 	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) )
   207: 	PORT_DIPSETTING(	0x00, DEF_STR( Upright ) )
   208: 	PORT_DIPSETTING(	0x04, DEF_STR( Cocktail ) )
   209: 	PORT_DIPNAME( 0x18, 0x18, "Bonus time set" )
   210: 	PORT_DIPSETTING(    0x18, "30 secs" )
   211: 	PORT_DIPSETTING(    0x10, "20 secs" )
   212: 	PORT_DIPSETTING(    0x08, "15 secs" )
   213: 	PORT_DIPSETTING(    0x00, "10 secs" )
   214: 	PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) )
   215: 	PORT_DIPSETTING(	0x60, "Easy" )
   216: 	PORT_DIPSETTING(	0x40, "Normal" )
   217: 	PORT_DIPSETTING(	0x20, "Difficult" )
   218: 	PORT_DIPSETTING(	0x00, "Very difficult" )
   219: 	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
   220: 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
   221: 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
   222: 
   223: 	PORT_START	/* COINSW */
   224: 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
   225: 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
   226: 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
   227: 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
   228: 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
   229: 	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) )
   230: 	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
   231: 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
   232: 	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
   233: 	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
   234: 	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
   235: 	PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
   236: 
   237: 	PORT_START	/* PLAYER 1 INPUTS */
   238: 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_PLAYER1 )
   239: 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
   240: 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_8WAY | IPF_PLAYER1 )
   241: 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_PLAYER1 )
   242: 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
   243: 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
   244: 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER1 )
   245: 	PORT_DIPNAME( 0x80, 0x80, "Period time set" )
   246: 	PORT_DIPSETTING(    0x80, "4" )
   247: 	PORT_DIPSETTING(    0x00, "7" )
   248: 
   249: 
   250: 	PORT_START	/* PLAYER 2 INPUTS */
   251: 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_PLAYER2 )
   252: 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
   253: 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_8WAY | IPF_PLAYER2 )
   254: 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_PLAYER2 )
   255: 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
   256: 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
   257: 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER2 )
   258: 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
   259: 
   260: 	/* Trackball 1P */
   261: 	PORT_START
   262: 	PORT_ANALOG( 0xff, 0x00, IPT_TRACKBALL_Y | IPF_REVERSE | IPF_PLAYER1, 100, 63, 0, 0)
   263: 	PORT_START
   264: 	PORT_ANALOG( 0xff, 0x00, IPT_TRACKBALL_X | IPF_PLAYER1, 100, 63, 0, 0)
   265: 
   266: 	/* Trackball 2P */
   267: 	PORT_START
   268: 	PORT_ANALOG( 0xff, 0x00, IPT_TRACKBALL_Y | IPF_REVERSE | IPF_PLAYER2, 100, 63, 0, 0)
   269: 	PORT_START
   270: 	PORT_ANALOG( 0xff, 0x00, IPT_TRACKBALL_X | IPF_PLAYER2, 100, 63, 0, 0)
   271: INPUT_PORTS_END
   272: 
   273: INPUT_PORTS_START( bladstle )
   274: 	PORT_START	/* DSW #1 */
   275: 	PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
   276: 	PORT_DIPSETTING(    0x02, DEF_STR( 4C_1C ) )
   277: 	PORT_DIPSETTING(    0x05, DEF_STR( 3C_1C ) )
   278: 	PORT_DIPSETTING(    0x08, DEF_STR( 2C_1C ) )
   279: 	PORT_DIPSETTING(    0x04, DEF_STR( 3C_2C ) )
   280: 	PORT_DIPSETTING(    0x01, DEF_STR( 4C_3C ) )
   281: 	PORT_DIPSETTING(    0x0f, DEF_STR( 1C_1C ) )
   282: 	PORT_DIPSETTING(    0x00, DEF_STR( 4C_5C ) )
   283: 	PORT_DIPSETTING(    0x03, DEF_STR( 3C_4C ) )
   284: 	PORT_DIPSETTING(    0x07, DEF_STR( 2C_3C ) )
   285: 	PORT_DIPSETTING(    0x0e, DEF_STR( 1C_2C ) )
   286: 	PORT_DIPSETTING(    0x06, DEF_STR( 2C_5C ) )
   287: 	PORT_DIPSETTING(    0x0d, DEF_STR( 1C_3C ) )
   288: 	PORT_DIPSETTING(    0x0c, DEF_STR( 1C_4C ) )
   289: 	PORT_DIPSETTING(    0x0b, DEF_STR( 1C_5C ) )
   290: 	PORT_DIPSETTING(    0x0a, DEF_STR( 1C_6C ) )
   291: 	PORT_DIPSETTING(    0x09, DEF_STR( 1C_7C ) )
   292: 	PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
   293: 	PORT_DIPSETTING(    0x20, DEF_STR( 4C_1C ) )
   294: 	PORT_DIPSETTING(    0x50, DEF_STR( 3C_1C ) )
   295: 	PORT_DIPSETTING(    0x80, DEF_STR( 2C_1C ) )
   296: 	PORT_DIPSETTING(    0x40, DEF_STR( 3C_2C ) )
   297: 	PORT_DIPSETTING(    0x10, DEF_STR( 4C_3C ) )
   298: 	PORT_DIPSETTING(    0xf0, DEF_STR( 1C_1C ) )
   299: 	PORT_DIPSETTING(    0x00, DEF_STR( 4C_5C ) )
   300: 	PORT_DIPSETTING(    0x30, DEF_STR( 3C_4C ) )
   301: 	PORT_DIPSETTING(    0x70, DEF_STR( 2C_3C ) )
   302: 	PORT_DIPSETTING(    0xe0, DEF_STR( 1C_2C ) )
   303: 	PORT_DIPSETTING(    0x60, DEF_STR( 2C_5C ) )
   304: 	PORT_DIPSETTING(    0xd0, DEF_STR( 1C_3C ) )
   305: 	PORT_DIPSETTING(    0xc0, DEF_STR( 1C_4C ) )
   306: 	PORT_DIPSETTING(    0xb0, DEF_STR( 1C_5C ) )
   307: 	PORT_DIPSETTING(    0xa0, DEF_STR( 1C_6C ) )
   308: 	PORT_DIPSETTING(    0x90, DEF_STR( 1C_7C ) )
   309: 
   310: 	PORT_START	/* DSW #2 */
   311: 	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
   312: 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
   313: 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
   314: 	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
   315: 	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
   316: 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
   317: 	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) )
   318: 	PORT_DIPSETTING(	0x00, DEF_STR( Upright ) )
   319: 	PORT_DIPSETTING(	0x04, DEF_STR( Cocktail ) )
   320: 	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
   321: 	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
   322: 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
   323: 	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
   324: 	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
   325: 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
   326: 	PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) )
   327: 	PORT_DIPSETTING(	0x60, "Easy" )
   328: 	PORT_DIPSETTING(	0x40, "Normal" )
   329: 	PORT_DIPSETTING(	0x20, "Difficult" )
   330: 	PORT_DIPSETTING(	0x00, "Very difficult" )
   331: 	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
   332: 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
   333: 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
   334: 
   335: 	PORT_START	/* COINSW */
   336: 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
   337: 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
   338: 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
   339: 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
   340: 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
   341: 	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) )
   342: 	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
   343: 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
   344: 	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
   345: 	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
   346: 	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
   347: 	PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
   348: 
   349: 	PORT_START	/* PLAYER 1 INPUTS */
   350: 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_PLAYER1 )
   351: 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
   352: 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_8WAY | IPF_PLAYER1 )
   353: 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_PLAYER1 )
   354: 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
   355: 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
   356: 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER1 )
   357: 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
   358: 
   359: 	PORT_START	/* PLAYER 2 INPUTS */
   360: 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_PLAYER2 )
   361: 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
   362: 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_8WAY | IPF_PLAYER2 )
   363: 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_PLAYER2 )
   364: 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
   365: 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
   366: 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER2 )
   367: 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
   368: 
   369: 	/* Trackball 1P */
   370: 	PORT_START
   371: 	PORT_ANALOG( 0xff, 0x00, IPT_TRACKBALL_Y | IPF_REVERSE | IPF_PLAYER1, 100, 63, 0, 0)
   372: 	PORT_START
   373: 	PORT_ANALOG( 0xff, 0x00, IPT_TRACKBALL_X | IPF_PLAYER1, 100, 63, 0, 0)
   374: 
   375: 	/* Trackball 2P */
   376: 	PORT_START
   377: 	PORT_ANALOG( 0xff, 0x00, IPT_TRACKBALL_X | IPF_PLAYER2, 100, 63, 0, 0)
   378: 	PORT_START
   379: 	PORT_ANALOG( 0xff, 0x00, IPT_TRACKBALL_Y | IPF_PLAYER2, 100, 63, 0, 0)
   380: INPUT_PORTS_END
   381: 
   382: 
   383: 
   384: static struct GfxLayout charlayout =
   385: {
   386: 	8,8,			/* 8 x 8 characters */
   387: 	0x40000/32,		/* 8192 characters */
   388: 	4,				/* 4bpp */
   389: 	{ 0, 1, 2, 3 },	/* the four bitplanes are packed in one nibble */
   390: 	{ 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4 },
   391: 	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
   392: 	32*8			/* every character takes 32 consecutive bytes */
   393: };
   394: 
   395: static struct GfxLayout spritelayout =
   396: {
   397: 	8,8,			/* 8*8 sprites */
   398: 	0x40000/32,		/* 8192 sprites */
   399: 	4,				/* 4 bpp */
   400: 	{ 0, 1, 2, 3 },	/* the four bitplanes are packed in one nibble */
   401: 	{ 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4 },
   402: 	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
   403: 	32*8			/* every sprite takes 32 consecutive bytes */
   404: };
   405: 
   406: static struct GfxDecodeInfo gfxdecodeinfo[] =
   407: {
   408: 	{ REGION_GFX1, 0x000000, &charlayout,     0,	2 },	/* colors 00..31 */
   409: 	{ REGION_GFX1, 0x040000, &spritelayout,   32,	16 },	/* colors 32..47 but using lookup table */
   410: 	{ -1 } /* end of array */
   411: };
   412: 
   413: /***************************************************************************
   414: 
   415: 	Machine Driver
   416: 
   417: ***************************************************************************/
   418: 
   419: static struct YM2203interface ym2203_interface =
   420: {
   421: 	1,						/* 1 chip */
   422: 	3579545,				/* 3.579545 MHz? */
   423: 	{ YM2203_VOL(45,45) },
   424: 	{ 0 },
   425: 	{ 0 },
   426: 	{ UPD7759_0_port_w },
   427: 	{ bladestl_port_B_w }
   428: };
   429: 
   430: static struct UPD7759_interface upd7759_interface =
   431: {
   432: 	1,							/* number of chips */
   433: 	{ 60  },					/* volume */
   434: 	{ REGION_SOUND1 },					/* memory regions */
   435: 	UPD7759_STANDALONE_MODE,
   436: 	{ 0 }
   437: };
   438: 
   439: static MACHINE_DRIVER_START( bladestl )
   440: 
   441: 	/* basic machine hardware */
   442: 	MDRV_CPU_ADD(HD6309, 3000000)		/* 24MHz/8 (?) */
   443: 	MDRV_CPU_MEMORY(bladestl_readmem,bladestl_writemem)
   444: 	MDRV_CPU_VBLANK_INT(bladestl_interrupt,2) /* (1 IRQ + 1 NMI) */
   445: 
   446: 	MDRV_CPU_ADD(M6809, 2000000)
   447: 	MDRV_CPU_FLAGS(CPU_AUDIO_CPU)		/* ? */
   448: 	MDRV_CPU_MEMORY(bladestl_readmem_sound,bladestl_writemem_sound)
   449: 
   450: 	MDRV_FRAMES_PER_SECOND(60)
   451: 	MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
   452: 	MDRV_INTERLEAVE(10)
   453: 
   454: 	/* video hardware */
   455: 	MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
   456: 	MDRV_SCREEN_SIZE(32*8, 32*8)
   457: 	MDRV_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
   458: 	MDRV_GFXDECODE(gfxdecodeinfo)
   459: 	MDRV_PALETTE_LENGTH(48)
   460: 	MDRV_COLORTABLE_LENGTH(48 + 16*16)
   461: 
   462: 	MDRV_PALETTE_INIT(bladestl)
   463: 	MDRV_VIDEO_START(bladestl)
   464: 	MDRV_VIDEO_UPDATE(bladestl)
   465: 
   466: 	/* sound hardware */
   467: 	/* the initialization order is important, the port callbacks being
   468: 	   called at initialization time */
   469: 	MDRV_SOUND_ADD(UPD7759, upd7759_interface)
   470: 	MDRV_SOUND_ADD(YM2203, ym2203_interface)
   471: MACHINE_DRIVER_END
   472: 
   473: /***************************************************************************
   474: 
   475:   Game ROMs
   476: 
   477: ***************************************************************************/
   478: 
   479: ROM_START( bladestl )
   480: 	ROM_REGION( 0x18000, REGION_CPU1, 0 ) /* code + banked roms */
   481: 	ROM_LOAD( "797t01.bin", 0x10000, 0x08000, CRC(89d7185d) SHA1(0d2f346d9515cab0389106c0e227fb0bd84a2c9c) )	/* fixed ROM */
   482: 	ROM_CONTINUE(			0x08000, 0x08000 )				/* banked ROM */
   483: 
   484: 	ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the sound CPU */
   485: 	ROM_LOAD( "797c02", 0x08000, 0x08000, CRC(65a331ea) SHA1(f206f6c5f0474542a5b7686b2f4d2cc7077dd5b9) )
   486: 
   487: 	ROM_REGION( 0x080000, REGION_GFX1, ROMREGION_DISPOSE )
   488: 	ROM_LOAD( "797a05",	0x000000, 0x40000, CRC(5491ba28) SHA1(c807774827c55c211ab68f548e1e835289cc5744) )	/* tiles */
   489: 	ROM_LOAD( "797a06",	0x040000, 0x40000, CRC(d055f5cc) SHA1(3723b39b2a3e6dd8e7fc66bbfe1eef9f80818774) )	/* sprites */
   490: 
   491: 	ROM_REGION( 0x0100, REGION_PROMS, 0 )
   492: 	ROM_LOAD( "797a07", 0x0000, 0x0100, CRC(7aecad4e) SHA1(05150a8dd25bdd6ab0c5b350e6ffd272f040e46a) ) /* sprites lookup table */
   493: 
   494: 	ROM_REGION( 0xc0000, REGION_SOUND1, 0 ) /* uPD7759 data (chip 1) */
   495: 	ROM_LOAD( "797a03", 0x00000, 0x80000, CRC(9ee1a542) SHA1(c9a142a326875a50f03e49e83a84af8bb423a467) )
   496: 	ROM_LOAD( "797a04",	0x80000, 0x40000, CRC(9ac8ea4e) SHA1(9f81eff970c9e8aea6f67d8a7d89805fae044ae1) )
   497: ROM_END
   498: 
   499: ROM_START( bladstle )
   500: 	ROM_REGION( 0x18000, REGION_CPU1, 0 ) /* code + banked roms */
   501: 	ROM_LOAD( "797e01", 0x10000, 0x08000, CRC(f8472e95) SHA1(8b6caa905fb1642300dd9da508871b00429872c3) )	/* fixed ROM */
   502: 	ROM_CONTINUE(		0x08000, 0x08000 )				/* banked ROM */
   503: 
   504: 	ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the sound CPU */
   505: 	ROM_LOAD( "797c02", 0x08000, 0x08000, CRC(65a331ea) SHA1(f206f6c5f0474542a5b7686b2f4d2cc7077dd5b9) )
   506: 
   507: 	ROM_REGION( 0x080000, REGION_GFX1, ROMREGION_DISPOSE )
   508: 	ROM_LOAD( "797a05",	0x000000, 0x40000, CRC(5491ba28) SHA1(c807774827c55c211ab68f548e1e835289cc5744) )	/* tiles */
   509: 	ROM_LOAD( "797a06",	0x040000, 0x40000, CRC(d055f5cc) SHA1(3723b39b2a3e6dd8e7fc66bbfe1eef9f80818774) )	/* sprites */
   510: 
   511: 	ROM_REGION( 0x0100, REGION_PROMS, 0 )
   512: 	ROM_LOAD( "797a07", 0x0000, 0x0100, CRC(7aecad4e) SHA1(05150a8dd25bdd6ab0c5b350e6ffd272f040e46a) ) /* sprites lookup table */
   513: 
   514: 	ROM_REGION( 0xc0000, REGION_SOUND1, 0 ) /* uPD7759 data */
   515: 	ROM_LOAD( "797a03", 0x00000, 0x80000, CRC(9ee1a542) SHA1(c9a142a326875a50f03e49e83a84af8bb423a467) )
   516: 	ROM_LOAD( "797a04",	0x80000, 0x40000, CRC(9ac8ea4e) SHA1(9f81eff970c9e8aea6f67d8a7d89805fae044ae1) )
   517: ROM_END
   518: 
   519: 
   520: 
   521: GAME( 1987, bladestl, 0,        bladestl, bladestl, 0, ROT90, "Konami", "Blades of Steel (version T)" )
   522: GAME( 1987, bladstle, bladestl, bladestl, bladstle, 0, ROT90, "Konami", "Blades of Steel (version E)" )
   523: 




powered by ggdb.com this page took approx. 0.015s