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Coin-Op : Arcade : Chequered Flag : VM Driver Source

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     1: /***************************************************************************
     2: 
     3: Chequered Flag / Checkered Flag (GX717) (c) Konami 1988
     4: 
     5: Notes:
     6: - The enemies might not appear correctly because of the K051733 protection.
     7: - 007232 volume & panning control is almost certainly wrong
     8: 
     9: ***************************************************************************/
    10: 
    11: #include "driver.h" 
    12: #include "cpu/z80/z80.h" 
    13: #include "cpu/konami/konami.h" 
    14: #include "vidhrdw/konamiic.h" 
    15: 
    16: static int K051316_readroms;
    17: 
    18: static WRITE_HANDLER( k007232_extvolume_w );
    19: 
    20: /* from vidhrdw/chqflag.c */
    21: VIDEO_START( chqflag );
    22: VIDEO_UPDATE( chqflag );
    23: 
    24: 
    25: static INTERRUPT_GEN( chqflag_interrupt )
    26: {
    27: 	if (cpu_getiloops() == 0)
    28: 	{
    29: 		if (K051960_is_IRQ_enabled())
    30: 			cpu_set_irq_line(0, KONAMI_IRQ_LINE, HOLD_LINE);
    31: 	}
    32: 	else if (cpu_getiloops() % 2)
    33: 	{
    34: 		if (K051960_is_NMI_enabled())
    35: 			cpu_set_irq_line(0, IRQ_LINE_NMI, PULSE_LINE);
    36: 	}
    37: }
    38: 
    39: static WRITE_HANDLER( chqflag_bankswitch_w )
    40: {
    41: 	int bankaddress;
    42: 	unsigned char *RAM = memory_region(REGION_CPU1);
    43: 
    44: 	/* bits 0-4 = ROM bank # (0x00-0x11) */
    45: 	bankaddress = 0x10000 + (data & 0x1f)*0x4000;
    46: 	cpu_setbank(4,&RAM[bankaddress]);
    47: 
    48: 	/* bit 5 = memory bank select */
    49: 	if (data & 0x20){
    50: 		memory_set_bankhandler_r (2, 0, paletteram_r);							/* palette */
    51: 		memory_set_bankhandler_w (2, 0, paletteram_xBBBBBGGGGGRRRRR_swap_w);	/* palette */
    52: 		if (K051316_readroms){
    53: 			memory_set_bankhandler_r (1, 0, K051316_rom_0_r);	/* 051316 #1 (ROM test) */
    54: 			memory_set_bankhandler_w (1, 0, K051316_0_w);		/* 051316 #1 */
    55: 		}
    56: 		else{
    57: 			memory_set_bankhandler_r (1, 0, K051316_0_r);		/* 051316 #1 */
    58: 			memory_set_bankhandler_w (1, 0, K051316_0_w);		/* 051316 #1 */
    59: 		}
    60: 	}
    61: 	else{
    62: 		memory_set_bankhandler_r (1, 0, MRA_RAM);				/* RAM */
    63: 		memory_set_bankhandler_w (1, 0, MWA_RAM);				/* RAM */
    64: 		memory_set_bankhandler_r (2, 0, MRA_RAM);				/* RAM */
    65: 		memory_set_bankhandler_w (2, 0, MWA_RAM);				/* RAM */
    66: 	}
    67: 
    68: 	/* other bits unknown/unused */
    69: }
    70: 
    71: static WRITE_HANDLER( chqflag_vreg_w )
    72: {
    73: 	static int last;
    74: 
    75: 	/* bits 0 & 1 = coin counters */
    76: 	coin_counter_w(1,data & 0x01);
    77: 	coin_counter_w(0,data & 0x02);
    78: 
    79: 	/* bit 4 = enable rom reading thru K051316 #1 & #2 */
    80: 	if ((K051316_readroms = (data & 0x10))){
    81: 		memory_set_bankhandler_r (3, 0, K051316_rom_1_r);	/* 051316 (ROM test) */
    82: 	}
    83: 	else{
    84: 		memory_set_bankhandler_r (3, 0, K051316_1_r);		/* 051316 */
    85: 	}
    86: 
    87: 	/* Bits 3-7 probably control palette dimming in a similar way to TMNT2/Saunset Riders, */
    88: 	/* however I don't have enough evidence to determine the exact behaviour. */
    89: 	/* Bits 3 and 7 are set in night stages, where the background should get darker and */
    90: 	/* the headlight (which have the shadow bit set) become highlights */
    91: 	/* Maybe one of the bits inverts the SHAD line while the other darkens the background. */
    92: 	if (data & 0x08)
    93: 		palette_set_shadow_factor(1/PALETTE_DEFAULT_SHADOW_FACTOR);
    94: 	else
    95: 		palette_set_shadow_factor(PALETTE_DEFAULT_SHADOW_FACTOR);
    96: 
    97: 	if ((data & 0x80) != last)
    98: 	{
    99: 		double brt = (data & 0x80) ? PALETTE_DEFAULT_SHADOW_FACTOR : 1.0;
   100: 		int i;
   101: 
   102: 		last = data & 0x80;
   103: 
   104: 		/* only affect the background */
   105: 		for (i = 512;i < 1024;i++)
   106: 			palette_set_brightness(i,brt);
   107: 	}
   108: 
   109: //if ((data & 0xf8) && (data & 0xf8) != 0x88)
   110: //	usrintf_showmessage("chqflag_vreg_w %02x",data);
   111: 
   112: 
   113: 	/* other bits unknown. bit 5 is used. */
   114: }
   115: 
   116: static int analog_ctrl;
   117: 
   118: static WRITE_HANDLER( select_analog_ctrl_w )
   119: {
   120: 	analog_ctrl = data;
   121: }
   122: 
   123: static READ_HANDLER( analog_read_r )
   124: {
   125: 	static int accel, wheel;
   126: 
   127: 	switch (analog_ctrl & 0x03){
   128: 		case 0x00: return (accel = readinputport(5));	/* accelerator */
   129: 		case 0x01: return (wheel = readinputport(6));	/* steering */
   130: 		case 0x02: return accel;						/* accelerator (previous?) */
   131: 		case 0x03: return wheel;						/* steering (previous?) */
   132: 	}
   133: 
   134: 	return 0xff;
   135: }
   136: 
   137: WRITE_HANDLER( chqflag_sh_irqtrigger_w )
   138: {
   139: 	cpu_set_irq_line(1,0,HOLD_LINE);
   140: }
   141: 
   142: 
   143: /****************************************************************************/
   144: 
   145: static MEMORY_READ_START( chqflag_readmem )
   146: 	{ 0x0000, 0x0fff, MRA_RAM },					/* RAM */
   147: 	{ 0x1000, 0x17ff, MRA_BANK1 },					/* banked RAM (RAM/051316 (chip 1)) */
   148: 	{ 0x1800, 0x1fff, MRA_BANK2 },					/* palette + RAM */
   149: 	{ 0x2000, 0x2007, K051937_r },					/* Sprite control registers */
   150: 	{ 0x2400, 0x27ff, K051960_r },					/* Sprite RAM */
   151: 	{ 0x2800, 0x2fff, MRA_BANK3 },					/* 051316 zoom/rotation (chip 2) */
   152: 	{ 0x3100, 0x3100, input_port_0_r },				/* DIPSW #1  */
   153: 	{ 0x3200, 0x3200, input_port_3_r },				/* COINSW, STARTSW, test mode */
   154: 	{ 0x3201, 0x3201, input_port_2_r },				/* DIPSW #3, SW 4 */
   155: 	{ 0x3203, 0x3203, input_port_1_r },				/* DIPSW #2 */
   156: 	{ 0x3400, 0x341f, K051733_r },					/* 051733 (protection) */
   157: 	{ 0x3701, 0x3701, input_port_4_r },				/* Brake + Shift + ? */
   158: 	{ 0x3702, 0x3702, analog_read_r },				/* accelerator/wheel */
   159: 	{ 0x4000, 0x7fff, MRA_BANK4 },					/* banked ROM */
   160: 	{ 0x8000, 0xffff, MRA_ROM },					/* ROM */
   161: MEMORY_END
   162: 
   163: static MEMORY_WRITE_START( chqflag_writemem )
   164: 	{ 0x0000, 0x0fff, MWA_RAM },					/* RAM */
   165: 	{ 0x1000, 0x17ff, MWA_BANK1 },					/* banked RAM (RAM/051316 (chip 1)) */
   166: 	{ 0x1800, 0x1fff, MWA_BANK2 },					/* palette + RAM */
   167: 	{ 0x2000, 0x2007, K051937_w },					/* Sprite control registers */
   168: 	{ 0x2400, 0x27ff, K051960_w },					/* Sprite RAM */
   169: 	{ 0x2800, 0x2fff, K051316_1_w },				/* 051316 zoom/rotation (chip 2) */
   170: 	{ 0x3000, 0x3000, soundlatch_w },				/* sound code # */
   171: 	{ 0x3001, 0x3001, chqflag_sh_irqtrigger_w },	/* cause interrupt on audio CPU */
   172: 	{ 0x3002, 0x3002, chqflag_bankswitch_w },		/* bankswitch control */
   173: 	{ 0x3003, 0x3003, chqflag_vreg_w },				/* enable K051316 ROM reading */
   174: 	{ 0x3300, 0x3300, watchdog_reset_w },			/* watchdog timer */
   175: 	{ 0x3400, 0x341f, K051733_w },					/* 051733 (protection) */
   176: 	{ 0x3500, 0x350f, K051316_ctrl_0_w },			/* 051316 control registers (chip 1) */
   177: 	{ 0x3600, 0x360f, K051316_ctrl_1_w },			/* 051316 control registers (chip 2) */
   178: 	{ 0x3700, 0x3700, select_analog_ctrl_w },		/* select accelerator/wheel */
   179: 	{ 0x3702, 0x3702, select_analog_ctrl_w },		/* select accelerator/wheel (mirror?) */
   180: 	{ 0x4000, 0x7fff, MWA_ROM },					/* banked ROM */
   181: 	{ 0x8000, 0xffff, MWA_ROM },					/* ROM */
   182: MEMORY_END
   183: 
   184: static MEMORY_READ_START( chqflag_readmem_sound )
   185: 	{ 0x0000, 0x7fff, MRA_ROM },				/* ROM */
   186: 	{ 0x8000, 0x87ff, MRA_RAM },				/* RAM */
   187: 	{ 0xa000, 0xa00d, K007232_read_port_0_r },	/* 007232 (chip 1) */
   188: 	{ 0xb000, 0xb00d, K007232_read_port_1_r },	/* 007232 (chip 2) */
   189: 	{ 0xc001, 0xc001, YM2151_status_port_0_r },	/* YM2151 */
   190: 	{ 0xd000, 0xd000, soundlatch_r },			/* soundlatch_r */
   191: 	//{ 0xe000, 0xe000, MRA_NOP },				/* ??? */
   192: MEMORY_END
   193: 
   194: static WRITE_HANDLER( k007232_bankswitch_w )
   195: {
   196: 	int bank_A, bank_B;
   197: 
   198: 	/* banks # for the 007232 (chip 1) */
   199: 	bank_A = ((data >> 4) & 0x03);
   200: 	bank_B = ((data >> 6) & 0x03);
   201: 	K007232_set_bank( 0, bank_A, bank_B );
   202: 
   203: 	/* banks # for the 007232 (chip 2) */
   204: 	bank_A = ((data >> 0) & 0x03);
   205: 	bank_B = ((data >> 2) & 0x03);
   206: 	K007232_set_bank( 1, bank_A, bank_B );
   207: }
   208: 
   209: static MEMORY_WRITE_START( chqflag_writemem_sound )
   210: 	{ 0x0000, 0x7fff, MWA_ROM },					/* ROM */
   211: 	{ 0x8000, 0x87ff, MWA_RAM },					/* RAM */
   212: 	{ 0x9000, 0x9000, k007232_bankswitch_w },		/* 007232 bankswitch */
   213: 	{ 0xa000, 0xa00d, K007232_write_port_0_w },		/* 007232 (chip 1) */
   214: 	{ 0xa01c, 0xa01c, k007232_extvolume_w },/* extra volume, goes to the 007232 w/ A11 */
   215: 											/* selecting a different latch for the external port */
   216: 	{ 0xb000, 0xb00d, K007232_write_port_1_w },		/* 007232 (chip 2) */
   217: 	{ 0xc000, 0xc000, YM2151_register_port_0_w },	/* YM2151 */
   218: 	{ 0xc001, 0xc001, YM2151_data_port_0_w },		/* YM2151 */
   219: 	{ 0xf000, 0xf000, MWA_NOP },					/* ??? */
   220: MEMORY_END
   221: 
   222: 
   223: INPUT_PORTS_START( chqflag )
   224: 	PORT_START	/* DSW #1 */
   225: 	PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
   226: 	PORT_DIPSETTING(    0x02, DEF_STR( 4C_1C ) )
   227: 	PORT_DIPSETTING(    0x05, DEF_STR( 3C_1C ) )
   228: 	PORT_DIPSETTING(    0x08, DEF_STR( 2C_1C ) )
   229: 	PORT_DIPSETTING(    0x04, DEF_STR( 3C_2C ) )
   230: 	PORT_DIPSETTING(    0x01, DEF_STR( 4C_3C ) )
   231: 	PORT_DIPSETTING(    0x0f, DEF_STR( 1C_1C ) )
   232: 	PORT_DIPSETTING(    0x03, DEF_STR( 3C_4C ) )
   233: 	PORT_DIPSETTING(    0x07, DEF_STR( 2C_3C ) )
   234: 	PORT_DIPSETTING(    0x0e, DEF_STR( 1C_2C ) )
   235: 	PORT_DIPSETTING(    0x06, DEF_STR( 2C_5C ) )
   236: 	PORT_DIPSETTING(    0x0d, DEF_STR( 1C_3C ) )
   237: 	PORT_DIPSETTING(    0x0c, DEF_STR( 1C_4C ) )
   238: 	PORT_DIPSETTING(    0x0b, DEF_STR( 1C_5C ) )
   239: 	PORT_DIPSETTING(    0x0a, DEF_STR( 1C_6C ) )
   240: 	PORT_DIPSETTING(    0x09, DEF_STR( 1C_7C ) )
   241: 	PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
   242: 	PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
   243: 	PORT_DIPSETTING(    0x20, DEF_STR( 4C_1C ) )
   244: 	PORT_DIPSETTING(    0x50, DEF_STR( 3C_1C ) )
   245: 	PORT_DIPSETTING(    0x80, DEF_STR( 2C_1C ) )
   246: 	PORT_DIPSETTING(    0x40, DEF_STR( 3C_2C ) )
   247: 	PORT_DIPSETTING(    0x10, DEF_STR( 4C_3C ) )
   248: 	PORT_DIPSETTING(    0xf0, DEF_STR( 1C_1C ) )
   249: 	PORT_DIPSETTING(    0x30, DEF_STR( 3C_4C ) )
   250: 	PORT_DIPSETTING(    0x70, DEF_STR( 2C_3C ) )
   251: 	PORT_DIPSETTING(    0xe0, DEF_STR( 1C_2C ) )
   252: 	PORT_DIPSETTING(    0x60, DEF_STR( 2C_5C ) )
   253: 	PORT_DIPSETTING(    0xd0, DEF_STR( 1C_3C ) )
   254: 	PORT_DIPSETTING(    0xc0, DEF_STR( 1C_4C ) )
   255: 	PORT_DIPSETTING(    0xb0, DEF_STR( 1C_5C ) )
   256: 	PORT_DIPSETTING(    0xa0, DEF_STR( 1C_6C ) )
   257: 	PORT_DIPSETTING(    0x90, DEF_STR( 1C_7C ) )
   258: //	PORT_DIPSETTING(    0x00, "Coin Slot 2 Invalidity" )
   259: 
   260: 	PORT_START	/* DSW #2 (according to the manual SW1 thru SW5 are not used) */
   261: 	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )
   262: 	PORT_DIPSETTING(	0x01, DEF_STR( Off ) )
   263: 	PORT_DIPSETTING(	0x00, DEF_STR( On ) )
   264: 	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unused ) )
   265: 	PORT_DIPSETTING(	0x02, DEF_STR( Off ) )
   266: 	PORT_DIPSETTING(	0x00, DEF_STR( On ) )
   267: 	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) )
   268: 	PORT_DIPSETTING(	0x04, DEF_STR( Off ) )
   269: 	PORT_DIPSETTING(	0x00, DEF_STR( On ) )
   270: 	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
   271: 	PORT_DIPSETTING(	0x08, DEF_STR( Off ) )
   272: 	PORT_DIPSETTING(	0x00, DEF_STR( On ) )
   273: 	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
   274: 	PORT_DIPSETTING(	0x10, DEF_STR( Off ) )
   275: 	PORT_DIPSETTING(	0x00, DEF_STR( On ) )
   276: 	PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) )
   277: 	PORT_DIPSETTING(	0x60, "Easy" )
   278: 	PORT_DIPSETTING(	0x40, "Normal" )
   279: 	PORT_DIPSETTING(	0x20, "Difficult" )
   280: 	PORT_DIPSETTING(	0x00, "Very difficult" )
   281: 	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
   282: 	PORT_DIPSETTING(	0x80, DEF_STR( Off ) )
   283: 	PORT_DIPSETTING(	0x00, DEF_STR( On ) )
   284: 
   285: 	PORT_START
   286: 	PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNKNOWN )
   287: 	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )	/* DIPSW #3 - SW4 */
   288: 	PORT_DIPSETTING(	0x80, DEF_STR( Off ) )
   289: 	PORT_DIPSETTING(	0x00, DEF_STR( On ) )
   290: 
   291: 	PORT_START
   292: 	/* COINSW + STARTSW */
   293: 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
   294: 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
   295: 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
   296: 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
   297: 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
   298: 	/* DIPSW #3 */
   299: 	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
   300: 	PORT_DIPSETTING(	0x20, DEF_STR( Off ) )
   301: 	PORT_DIPSETTING(	0x00, DEF_STR( On ) )
   302: 	PORT_DIPNAME( 0x40, 0x40, "Title" )
   303: 	PORT_DIPSETTING(	0x40, "Chequered Flag" )
   304: 	PORT_DIPSETTING(	0x00, "Checkered Flag" )
   305: 	PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
   306: 
   307: 	PORT_START	/* Brake, Shift + ??? */
   308: 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_TOGGLE )
   309: 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
   310: 	PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNKNOWN )	/* if this is set, it goes directly to test mode */
   311: 	PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNKNOWN )	/* if bit 7 == 0, the game resets */
   312: 
   313: 	PORT_START	/* Accelerator */
   314: 	PORT_ANALOG( 0xff, 0x00, IPT_PEDAL, 50, 5, 0, 0xff )
   315: 
   316: 	PORT_START	/* Driving wheel */
   317: 	PORT_ANALOG( 0xff, 0x80, IPT_AD_STICK_X | IPF_CENTER, 80, 8, 0, 0xff)
   318: INPUT_PORTS_END
   319: 
   320: 
   321: 
   322: static void chqflag_ym2151_irq_w(int data)
   323: {
   324: 	cpu_set_irq_line(1,IRQ_LINE_NMI,PULSE_LINE);
   325: }
   326: 
   327: 
   328: static struct YM2151interface ym2151_interface =
   329: {
   330: 	1,
   331: 	3579545,	/* 3.579545 MHz? */
   332: 	{ YM3012_VOL(80,MIXER_PAN_LEFT,80,MIXER_PAN_RIGHT) },
   333: 	{ chqflag_ym2151_irq_w },
   334: 	{ 0 }
   335: };
   336: 
   337: static void volume_callback0(int v)
   338: {
   339: 	K007232_set_volume(0,0,(v & 0x0f)*0x11,0);
   340: 	K007232_set_volume(0,1,0,(v >> 4)*0x11);
   341: }
   342: 
   343: static WRITE_HANDLER( k007232_extvolume_w )
   344: {
   345: 	K007232_set_volume(1,1,(data & 0x0f)*0x11/2,(data >> 4)*0x11/2);
   346: }
   347: 
   348: static void volume_callback1(int v)
   349: {
   350: 	K007232_set_volume(1,0,(v & 0x0f)*0x11/2,(v >> 4)*0x11/2);
   351: }
   352: 
   353: static struct K007232_interface k007232_interface =
   354: {
   355: 	2,															/* number of chips */
   356: 	3579545,	/* clock */
   357: 	{ REGION_SOUND1, REGION_SOUND2 },							/* memory regions */
   358: 	{ K007232_VOL(20,MIXER_PAN_CENTER,20,MIXER_PAN_CENTER),		/* volume */
   359: 		K007232_VOL(20,MIXER_PAN_LEFT,20,MIXER_PAN_RIGHT) },
   360: 	{ volume_callback0,  volume_callback1 }						/* external port callback */
   361: };
   362: 
   363: static MACHINE_DRIVER_START( chqflag )
   364: 
   365: 	/* basic machine hardware */
   366: 	MDRV_CPU_ADD(KONAMI,3000000)	/* 052001 */
   367: 	MDRV_CPU_MEMORY(chqflag_readmem,chqflag_writemem)
   368: 	MDRV_CPU_VBLANK_INT(chqflag_interrupt,16)	/* ? */
   369: 
   370: 	MDRV_CPU_ADD(Z80, 3579545)
   371: 	MDRV_CPU_FLAGS(CPU_AUDIO_CPU)	/* ? */
   372: 	MDRV_CPU_MEMORY(chqflag_readmem_sound,chqflag_writemem_sound)
   373: 
   374: 	MDRV_FRAMES_PER_SECOND(60)
   375: 	MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
   376: 	MDRV_INTERLEAVE(10)
   377: 
   378: 	/* video hardware */
   379: 	MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER | VIDEO_HAS_SHADOWS)
   380: 	MDRV_SCREEN_SIZE(64*8, 32*8)
   381: 	MDRV_VISIBLE_AREA(12*8, (64-14)*8-1, 2*8, 30*8-1 )
   382: 	MDRV_PALETTE_LENGTH(1024)
   383: 
   384: 	MDRV_VIDEO_START(chqflag)
   385: 	MDRV_VIDEO_UPDATE(chqflag)
   386: 
   387: 	/* sound hardware */
   388: 	MDRV_SOUND_ATTRIBUTES(SOUND_SUPPORTS_STEREO)
   389: 	MDRV_SOUND_ADD(YM2151, ym2151_interface)
   390: 	MDRV_SOUND_ADD(K007232, k007232_interface)
   391: MACHINE_DRIVER_END
   392: 
   393: 
   394: 
   395: ROM_START( chqflag )
   396: 	ROM_REGION( 0x58800, REGION_CPU1, 0 )	/* 052001 code */
   397: 	ROM_LOAD( "717h02",		0x050000, 0x008000, CRC(f5bd4e78) SHA1(7bab02152d055a6c3a322c88e7ee0b85a39d8ef2) )	/* banked ROM */
   398: 	ROM_CONTINUE(			0x008000, 0x008000 )				/* fixed ROM */
   399: 	ROM_LOAD( "717e10",		0x010000, 0x040000, CRC(72fc56f6) SHA1(433ea9a33f0230e046c731c70060f6a38db14ac7) )	/* banked ROM */
   400: 	/* extra memory for banked RAM */
   401: 
   402: 	ROM_REGION( 0x10000, REGION_CPU2, 0 )	/* 64k for the SOUND CPU */
   403: 	ROM_LOAD( "717e01",		0x000000, 0x008000, CRC(966b8ba8) SHA1(ab7448cb61fa5922b1d8ae5f0d0f42d734ed4f93) )
   404: 
   405:     ROM_REGION( 0x100000, REGION_GFX1, 0 )	/* graphics (addressable by the main CPU) */
   406: 	ROM_LOAD( "717e04",		0x000000, 0x080000, CRC(1a50a1cc) SHA1(bc16fab84c637ed124e37b115ddc0149560b727d) )	/* sprites */
   407: 	ROM_LOAD( "717e05",		0x080000, 0x080000, CRC(46ccb506) SHA1(3ed1f54744fc5cdc0f48e42f250c366267a8199a) )	/* sprites */
   408: 
   409: 	ROM_REGION( 0x020000, REGION_GFX2, 0 )	/* graphics (addressable by the main CPU) */
   410: 	ROM_LOAD( "717e06",		0x000000, 0x020000, CRC(1ec26c7a) SHA1(05b5b522c5ebf5d0a71a7fc39ec9382008ef33c8) )	/* zoom/rotate (N16) */
   411: 
   412: 	ROM_REGION( 0x100000, REGION_GFX3, 0 )	/* graphics (addressable by the main CPU) */
   413: 	ROM_LOAD( "717e07",		0x000000, 0x040000, CRC(b9a565a8) SHA1(a11782f7336e5ad58a4c6ea81f2eeac35d5e7d0a) )	/* zoom/rotate (L20) */
   414: 	ROM_LOAD( "717e08",		0x040000, 0x040000, CRC(b68a212e) SHA1(b2bd121a43552c3ade528ac763a0df40c3e648e0) )	/* zoom/rotate (L22) */
   415: 	ROM_LOAD( "717e11",		0x080000, 0x040000, CRC(ebb171ec) SHA1(d65d4a6b169ce03e4427b2a397484634f938236b) )	/* zoom/rotate (N20) */
   416: 	ROM_LOAD( "717e12",		0x0c0000, 0x040000, CRC(9269335d) SHA1(af298c8cff50d707d6abc806065f8e931f975dc0) )	/* zoom/rotate (N22) */
   417: 
   418: 	ROM_REGION( 0x080000, REGION_SOUND1, 0 )	/* 007232 data (chip 1) */
   419: 	ROM_LOAD( "717e03",		0x000000, 0x080000, CRC(ebe73c22) SHA1(fad3334e5e91bf8d11b74ffdbbfd57567e6f6f8c) )
   420: 
   421: 	ROM_REGION( 0x080000, REGION_SOUND2, 0 )	/* 007232 data (chip 2) */
   422: 	ROM_LOAD( "717e09",		0x000000, 0x080000, CRC(d74e857d) SHA1(00c851c857650d67fc4caccea4461d99be4acb3c) )
   423: ROM_END
   424: 
   425: ROM_START( chqflagj )
   426: 	ROM_REGION( 0x58800, REGION_CPU1, 0 )	/* 052001 code */
   427: 	ROM_LOAD( "717j02.bin",	0x050000, 0x008000, CRC(05355daa) SHA1(130ddbc289c077565e44f33c63a63963e6417e19) )	/* banked ROM */
   428: 	ROM_CONTINUE(			0x008000, 0x008000 )				/* fixed ROM */
   429: 	ROM_LOAD( "717e10",		0x010000, 0x040000, CRC(72fc56f6) SHA1(433ea9a33f0230e046c731c70060f6a38db14ac7) )	/* banked ROM */
   430: 	/* extra memory for banked RAM */
   431: 
   432: 	ROM_REGION( 0x10000, REGION_CPU2, 0 )	/* 64k for the SOUND CPU */
   433: 	ROM_LOAD( "717e01",		0x000000, 0x008000, CRC(966b8ba8) SHA1(ab7448cb61fa5922b1d8ae5f0d0f42d734ed4f93) )
   434: 
   435:     ROM_REGION( 0x100000, REGION_GFX1, 0 )	/* graphics (addressable by the main CPU) */
   436: 	ROM_LOAD( "717e04",		0x000000, 0x080000, CRC(1a50a1cc) SHA1(bc16fab84c637ed124e37b115ddc0149560b727d) )	/* sprites */
   437: 	ROM_LOAD( "717e05",		0x080000, 0x080000, CRC(46ccb506) SHA1(3ed1f54744fc5cdc0f48e42f250c366267a8199a) )	/* sprites */
   438: 
   439: 	ROM_REGION( 0x020000, REGION_GFX2, 0 )	/* graphics (addressable by the main CPU) */
   440: 	ROM_LOAD( "717e06",		0x000000, 0x020000, CRC(1ec26c7a) SHA1(05b5b522c5ebf5d0a71a7fc39ec9382008ef33c8) )	/* zoom/rotate (N16) */
   441: 
   442: 	ROM_REGION( 0x100000, REGION_GFX3, 0 )	/* graphics (addressable by the main CPU) */
   443: 	ROM_LOAD( "717e07",		0x000000, 0x040000, CRC(b9a565a8) SHA1(a11782f7336e5ad58a4c6ea81f2eeac35d5e7d0a) )	/* zoom/rotate (L20) */
   444: 	ROM_LOAD( "717e08",		0x040000, 0x040000, CRC(b68a212e) SHA1(b2bd121a43552c3ade528ac763a0df40c3e648e0) )	/* zoom/rotate (L22) */
   445: 	ROM_LOAD( "717e11",		0x080000, 0x040000, CRC(ebb171ec) SHA1(d65d4a6b169ce03e4427b2a397484634f938236b) )	/* zoom/rotate (N20) */
   446: 	ROM_LOAD( "717e12",		0x0c0000, 0x040000, CRC(9269335d) SHA1(af298c8cff50d707d6abc806065f8e931f975dc0) )	/* zoom/rotate (N22) */
   447: 
   448: 	ROM_REGION( 0x080000, REGION_SOUND1, 0 )	/* 007232 data (chip 1) */
   449: 	ROM_LOAD( "717e03",		0x000000, 0x080000, CRC(ebe73c22) SHA1(fad3334e5e91bf8d11b74ffdbbfd57567e6f6f8c) )
   450: 
   451: 	ROM_REGION( 0x080000, REGION_SOUND2, 0 )	/* 007232 data (chip 2) */
   452: 	ROM_LOAD( "717e09",		0x000000, 0x080000, CRC(d74e857d) SHA1(00c851c857650d67fc4caccea4461d99be4acb3c) )
   453: ROM_END
   454: 
   455: 
   456: 
   457: static DRIVER_INIT( chqflag )
   458: {
   459: 	unsigned char *RAM = memory_region(REGION_CPU1);
   460: 
   461: 	konami_rom_deinterleave_2(REGION_GFX1);
   462: 	paletteram = &RAM[0x58000];
   463: }
   464: 
   465: GAMEX( 1988, chqflag,        0, chqflag, chqflag, chqflag, ROT90, "Konami", "Chequered Flag", GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND )
   466: GAMEX( 1988, chqflagj, chqflag, chqflag, chqflag, chqflag, ROT90, "Konami", "Chequered Flag (Japan)", GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND )
   467: 




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